The MC14008B 4–bit full adder is constructed with MOSP–channel and N–channel enhancement mode devices in a singlemonolithic structure. This device consists of four full adders with fastinternal look–ahead carry output. It is useful in binary addition andother arithmetic applications. The fast parallel carry output bit allowshigh–speed operation when used with other adders in a system.
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Look–Ahead Carry OutputDiode Protection on All InputsAll Outputs Buffered
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–powerSchottky TTL Load Over the Rated Temperature RangePin–for–Pin Replacement for CD4008B
MARKINGDIAGRAMS16PDIP–16P SUFFIXCASE 8MC14008BCPAWLYYWW116MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)
SymbolVDDVin, VoutIin, IoutPDTATstgTLParameterDC Supply Voltage RangeInput or Output Voltage Range(DC or Transient)Input or Output Current(DC or Transient) per PinPower Dissipation,per Package (Note 3.)Ambient Temperature RangeStorage Temperature RangeLead Temperature(8–Second Soldering)Value–0.5 to +18.0–0.5 to VDD + 0.5±10500–55 to +125–65 to +150260UnitVVmAmW°C°C°CAWL, LYY, YWW, WSOIC–16D SUFFIXCASE 751B116SOEIAJ–16F SUFFIXCASE 966114008BAWLYWWMC14008BALYW= Assembly Location= Wafer Lot= Year= Work Week2.Maximum Ratings are those values beyond which damage to the devicemay occur.
3.Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_CThis device contains protection circuitry to guard against damage due to highstatic voltages or electric fields. However, precautions must be taken to avoidapplications of any voltage higher than maximum rated voltages to thishigh–impedance circuit. For proper operation, Vin and Vout should be constrainedto the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,either VSS or VDD). Unused outputs must be left open.
ORDERING INFORMATION
DeviceMC14008BCPMC14008BDR2MC14008BF
PackagePDIP–16SOIC–16SOEIAJ–16
Shipping2000/Box2500/Tape & ReelSee Note 1.
1.For ordering information on the EIAJ version ofthe SOIC packages, please contact your localON Semiconductor representative.
© Semiconductor Components Industries, LLC, 20001
August, 2000 – Rev. 4
Publication Order Number:
MC14008B/D
MC14008B
TRUTH TABLE(One Stage)
Cin00001111
B00110011
A01010101
Cout00010111
S01101001
PIN ASSIGNMENT
A4B3A3B2A2B1A1VSS
12345678161514131211109VDDB4CoutS4S3S2S1Cin
BLOCK DIAGRAM
HIGH-SPEEDPARALLEL CARRYB415A4B3A3B2A2B1A1Cin
12345679
ADDER4C4ADDER3C3ADDER2C2ADDER114ąCout
13ąS4
12ąS3
11ąS2
10ąS1VDD = PIN 16VSS = PIN 8
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MC14008B
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)CharacteristicSymbolVOLVDDVdc5.010155.010155.010155.010155.05.010155.0101515—5.010155.01015– 55_CMin———25_C125_CMaxMin———Typ (4.)000MaxMin———MaxUnitVdcOutput VoltageVin = VDD or 0Vin = 0 or VDD“0” Level0.050.050.05———0.050.050.05———0.050.050.05———“1” LevelVOH4.959.9514.95———4.959.9514.95———5.010154.959.9514.95———VdcInput Voltage“0” Level(VO = 4.5 or 0.5 Vdc)(VO = 9.0 or 1.0 Vdc)(VO = 13.5 or 1.5 Vdc)(VO = 0.5 or 4.5 Vdc)“1” Level(VO = 1.0 or 9.0 Vdc)(VO = 1.5 or 13.5 Vdc)VIL1.53.04.0——————————2.254.506.752.755.508.251.53.04.0——————————1.53.04.0——————————VdcVIH3.57.0113.57.0113.57.011VdcOutput Drive Current(VOH = 2.5 Vdc) (VOH = 4.6 Vdc)(VOH = 9.5 Vdc)(VOH = 13.5 Vdc)(VOL = 0.4 Vdc) (VOL = 0.5 Vdc)(VOL = 1.5 Vdc)SourceIOHmAdc– 3.0– 0.– 1.6– 4.20.1..2—————– 2.4– 0.51– 1.3– 3.40.511.33.4—————– 4.2– 0.88– 2.25– 8.80.882.258.8– 1.7– 0.36– 0.9– 2.40.360.92.4—————SinkIOLmAdcInput CurrentInput Capacitance(Vin = 0)Iin± 0.1—5.01020±0.000015.00.0050.0100.015± 0.17.55.01020± 1.0—150300600µAdcpFµAdcCinQuiescent Current(Per Package)IDDTotal Supply Current (5.) (6.)(Dynamic plus Quiescent,Per Package)(CL = 50 pF on all outputs, allbuffers switching)ITIT = (1.7 µA/kHz) f + IDDIT = (3.4 µA/kHz) f + IDDIT = (5.0 µA/kHz) f + IDDµAdc4.Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.5.The formulas given are for the typical characteristics only at 25_C.6.To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.005.
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MC14008B
SWITCHING CHARACTERISTICS (7.) (CL = 50 pF, TA = 25_C)CharacteristicOutput Rise and Fall TimetTLH, tTHL = (1.5 ns/pF) CL + 25 nstTLH, tTHL = (0.75 ns/pF) CL + 12.5 nstTLH, tTHL = (0.55 ns/pF) CL + 9.5 nsSymboltTLH,tTHLVDDVdc5.01015Min———Typ (8.)1005040Max20010080UnitnsPropagation Delay TimeSum in to Sum OuttPLH, tPHL = (1.7 ns/pF) CL + 315 nstPLH, tPHL = (0.66 ns/pF) CL + 127 nstPLH, tPHL = (0.5 ns/pF) CL + 90 nsSum In to Carry OuttPLH, tPHL = (1.7 ns/pF) CL + 220 nstPLH, tPHL = (0.66 ns/pF) CL + 112 nstPLH, tPHL = (0.5 ns/pF) CL + 85 nsCarry In to Sum OuttPLH, tPHL = (1.7 ns/pF) CL + 290 nstPLH, tPHL = (0.66 ns/pF) CL + 122 nstPLH, tPHL = (0.5 ns/pF) CL + 90 nsCarry In to Carry OuttPLH, tPHL = (1.7 ns/pF) CL + 85 nstPLH, tPHL = (0.66 ns/pF) CL + 42 nstPLH, tPHL = (0.5 ns/pF) CL + 30 nstPLH, tPHLns5.010155.010155.010155.01015————————————40016011530514511037515511517075558003202306102902207503102303401501107.The formulas given are for the typical characteristics only at 25_C.8.Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
VDD = -āVGS16B4A4B3A3B2A2B1A1Cin8S4S3S2S1CoutVSSVoutVDD = VGS16B4A4B3A3B2A2IOHB1A1Cin8S4S3S2S1CoutVSSVoutIOLEXTERNALPOWERSUPPLYEXTERNALPOWERSUPPLYFigure 1. Typical Source CurrentCharacteristics Test CircuitFigure 2. Typical Sink CurrentCharacteristics Test Circuit
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MC14008B
VDD16B4A4B3A3B2A2B1A1Cin8500 µFS4S3S2S1CoutVSSIDDCLCLCLCL
20 ns90%10%20 nsVDDVSS
PULSEGENERATORVinCLFigure 3. Dynamic Power Dissipation Test Circuit and Waveform
VDD16B4A4B3A3B2A2B1A1Cin8S4S3S2S1CoutVSSIDD20 nsCin90%50%10%tPHLS1-S490%50%10%tTHLCout50%tPLHtPHLtTLHtPLH20 nsVDDVSSVOHVOLVOHVOLCLCLCL
PULSEGENERATORCLCLFigure 4. Switching Time Test Circuit and Waveforms
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MC14008B
Cout
B4
A4B3
S4
A3B2
S3
A2B1
S2
A1Cin
S1
Figure 5. Logic Diagram
TYPICAL APPLICATION
WORD A + B INPUTSA1B4A1B4A1B4A1B4CinCHIP1CoutCinCHIP2CoutCinCHIP3CoutCinCHIP4CoutS1S4S1S4S1S4S1S4SUM OUTPUTS
Calculation of 16–bit adder speed:
tP total = tP (Sum to Carry) + tP (Carry to Sum) + 2 tP (Carry to Carry)The guaranteed 16–bit adder speed at 10 V, 25°C, CL = 50 pF is:tp total = 290 + 310 + 300 = 900 ns
Figure 6. Using the MC14008B in a 16–Bit Adder Configuration
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MC14008B
PACKAGE DIMENSIONS
–A–169PDIP–16P SUFFIX
PLASTIC DIP PACKAGE
CASE 8–08ISSUE RB18NOTES:
1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
2.CONTROLLING DIMENSION: INCH.
3.DIMENSION L TO CENTER OF LEADS WHENFORMED PARALLEL.
4.DIMENSION B DOES NOT INCLUDE MOLD FLASH.5.ROUNDED CORNERS OPTIONAL.
DIMABCDFGHJKLMSINCHESMINMAX0.7400.7700.2500.2700.1450.1750.0150.0210.0400.700.100 BSC0.050 BSC0.0080.0150.1100.1300.2950.3050 _10 _0.0200.040MILLIMETERSMINMAX18.8019.556.356.853.694.440.390.531.021.772.54 BSC1.27 BSC0.210.382.803.307.507.740 _10 _0.511.01FSCL–T–HKGD16 PLSEATINGPLANEJTAMM
0.25 (0.010)M–A–169SOIC–16D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE JNOTES:
1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDEMOLD PROTRUSION.
4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.
5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.
DIMABCDFGJKMPRMILLIMETERSMINMAX9.8010.003.804.001.351.750.350.490.401.251.27 BSC0.190.250.100.250 7 __5.806.200.250.50INCHESMINMAX0.3860.3930.1500.1570.0540.0680.0140.0190.0160.0490.050 BSC0.0080.0090.0040.0090 7 __0.2290.2440.0100.019–B–18P8 PL0.25 (0.010)MBSGFKC–T–SEATINGPLANERX 45_MD16 PLMJ0.25 (0.010)TB
SA
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MC14008B
PACKAGE DIMENSIONS
SOEIAJ–16F SUFFIX
PLASTIC EIAJ SOIC PACKAGE
CASE 966–01ISSUE O
LEQ1EHE18169M_LDETAIL PZDeAVIEW PNOTES:
ąă1.DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ąă2.CONTROLLING DIMENSION: MILLIMETER.ąă3.DIMENSIONS D AND E DO NOT INCLUDEMOLD FLASH OR PROTRUSIONS AND AREMEASURED AT THE PARTING LINE. MOLD FLASHOR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE.ąă4.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.ąă5.THE LEAD WIDTH DIMENSION (b) DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWERRADIUS OR THE FOOT. MINIMUM SPACEBETWEEN PROTRUSIONS AND ADJACENT LEADTO BE 0.46 ( 0.018).DIMAA1bcDEeHELLEMQ1ZMILLIMETERSMINMAX---2.050.050.200.350.500.180.279.9010.505.105.451.27 BSC7.408.200.500.851.101.500 _10 _0.700.90---0.78INCHESMINMAX---0.0810.0020.0080.0140.0200.0070.0110.3900.4130.2010.2150.050 BSC0.2910.3230.0200.0330.0430.0590 _10 _0.0280.035---0.031cb0.13 (0.005)MA10.10 (0.004)ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changeswithout further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particularpurpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/orspecifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must bevalidated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury ordeath may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and holdSCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonableattorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claimalleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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Spanish Phone:303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
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Toll Free from Hong Kong & Singapore:001–800–4422–3781
Email: ONlit–asia@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031Phone: 81–3–5740–2745Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.comFor additional information, please contact your localSales Representative.http://onsemi.com8MC14008B/D
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