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专利名称:Data generator for generating data of
arbitrary length
发明人:Yasumasa Fujisawa申请号:US112985申请日:20051101
公开号:US200601558A1公开日:20060713
专利附图:
摘要:A data generator provides faster data than before. A parallel data generatorprovides first data having four or five effective data width according to a divided clockDCLK. A bit width adjuster having a FIFO memory receives the first parallel data to
provide second parallel data of constant four bit width despite of the bit width of thefirst parallel data. A parallel to serial converter converts the second parallel data intoserial data according to a reference clock RCLK that is faster than divided clock DCLK. Thefrequency of the divided clock DCLK can be constant, which makes it possible to use DLLto fasten the operation of the logic circuits.
申请人:Yasumasa Fujisawa
地址:Kawasaki JP
国籍:JP
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