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专利名称：System and method for efficiently
supporting access to I/O devices throughlarge direct-mapped data caches
发明人：Mogul, Jeffrey C.申请号：EP90313057.3申请日：19901130公开号：EP0436305B1公开日：19960724
摘要：A data processing system (10) includes a CPU (12) connected to a direct-mapped cache (14) by address bus (16) and data bus (18). The cache (14) includes a first-level cache (20) connected to a second-level cache (22) by address bus (24) and data bus(26). The second-level cache (22) of the cache (14) is connected to address bus (28) anddata bus (30) by address bus (32) and data bus (34). The address and data busses (28) and(30) are connected to memory (36) and I/O device (41) by address bus (40), data bus (42),address bus (44) and data bus (46), respectively. In the system (10), I/O interface (38)decodes physical memory addresses and responds to addresses in specific ranges usingfirst and second addresses alternately, which are chosen to collide in the data cache (14).I/O software alternates between the two addresses instead of alternating between adevice register address and a reserved-region address as in prior art systems.
申请人：DIGITAL EQUIPMENT CORPORATION
代理机构：Goodman, Christopher
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