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SELF-CHECKING PARITY CHECKER FOR TWO OR MORE INDEP

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专利名称:SELF-CHECKING PARITY CHECKER FOR TWO

OR MORE INDEPENDENT PARITY CODEDDATA PATHS

发明人:JOHNSON A,US申请号:US40045173申请日:19730924公开号:US38254A公开日:19740723

摘要:A series of self-checking error checking circuits are disclosed for checking twoor more independent sets of parity coded data lines. Each data signal set includes anylogical combination of binary \"1's\" and \"0's\" and at least one parity bit. Each checkingcircuit comprises two Exclusive-OR tree circuits wherein each tree obtains its inputs fromdifferent input lines of each set of independent data lines whereby complementingoutputs are produced by the two tree circuits for any correct signal set when the checkeris error free. Any error in the data will cause the two outputs to be the same.Malfunctions or failures in the checking circuit are checked by certain legitimate codesignals which similarly cause an error representation in the output of the checker.

申请人:IBM,US

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